1. Field of the Invention
This invention generally relates to a semiconductor device and a method of fabricating the same. This invention particularly relates to a MOSFET (metal-oxide-semiconductor field-effect transistor) and a method of fabricating the same.
2. Description of the Prior Art
A typical MOSFET has a substrate formed with a source region, a channel region, and a drain region. The channel region extends between the source region and the drain region. A gate insulating film made of an oxide extends on the source region, the channel region, and the drain region. A gate electrode is formed on an area of the gate insulating film which extends directly above the channel region.
As the MOSFET is scaled down or miniaturized, the distance between the source region and the drain region decreases. Such a decreased distance easily causes the punch through phenomenon, that is, the establishment of conduction (continuity) between the source region and the drain region. An effective way of preventing the punch through phenomenon is to increase the concentration of impurities in the substrate.
In the presence of a gate voltage, an increased concentration of impurities in the substrate reduces the width of a depletion layer below the gate electrode so that the intensity of a perpendicular (vertical) electric field at the boundary with the gate insulting film increases. The increased intensity of the electric field decreases the mobility of carriers, and thus lowers the transistor performance.
As the MOSFET is scaled down or miniaturized, the rating power supply voltage applied thereto tends to decrease. The decreased power supply voltage requires a lowered transistor threshold voltage. When the concentration of impurities in the substrate is increased as previously described, the threshold voltage rises. It is known that the threshold voltage can be decreased by introducing new impurities, corresponding to a conduction type opposite to the conduction type concerning the original impurities, into a surface portion of the substrate.
In cases where new impurities are introduced into the substrate as indicated above, the drain current (leak current) which occurs at a gate voltage of 0 volt increases although the threshold voltage drops.
An increased concentration of impurities in the substrate reduces the widths of depletion layers below the source region and the drain region, so that the capacitances related to the source region and the drain region increase. As a result of the increase in the capacitances, the delay time in transistor operation lengthens and the transistor operation speed drops.